Silicon/silicon carbide (Si/SiC ) hybrid switches, which combine advantages of Si and SiC under varying loads, have been a preferred solution to achieve cost-performance trade-off for traction inverters [1], [2]. However, this technology has not been in volume production in the industry due to several constraints.
First, existing studies rarely discuss optimal design method of the Si/SiC die area, which directly affects both the cost and efficiency of the traction inverter. Conventionally, SiC MOSFETs with less die areas are used to switch current under light load, while large Si IGBTs are used to carry high current under heavy load [3], [4], [5]. Therefore, the maximum current capability is limited by the IGBTs. While increasing IGBT die size can enhance current capability, Peng et al. [6] shows that large Si/SiC die-size ratio increases thermal stress for the SiC MOSFETs, whereas small ratio increases cost. Furthermore, the SiC Schottky barrier diodes (SBDs) exhibit superior reverse recovery loss performance compared to the MOSFET body diode [7]. However, few studies have considered optimizing the area of SBDs to further reduce switching losses. Therefore, optimal die area is crucial for achieving low-cost, high efficiency, and high-current capability for the hybrid Si/SiC switches.
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